1.
Phan Hong Minh, Nguyen Tien Viet, Do Doanh Dien. Hardware-efficient matrix multiplication core optimization for edge AI on FPGA. JMST [Internet]. 2025 Oct. 30 [cited 2026 Jan. 26];(IITE):123-30. Available from: https://jmst.mod.gov.vn/index.php/jmst/article/view/1869