1.
Ngọc. AN FPGA-BASED HARDWARE ACCELERATOR DATA SYNCHRONIZATION FROM DIGITAL RECEIVERS. J. Mil. Sci. Technol. [Internet]. 2021 Feb. 5 [cited 2026 Mar. 12];(71):88-97. Available from: https://jmst.mod.gov.vn/index.php/jmst/article/view/96